Thursday, June 13, 2002, 8:30 AM - 10:00 AM | Room: 287 SESSION 40    Timing Analysis and Memory Optimization for Embedded Systems    Chair: Giuseppe Lipari - Scuola S. Anna, Pisa, ITA    Organizers: Marco Di Natale, Xiaobo Sharon Hu    High performance embedded systems present many design challenges, e.g., timing analysis and memory management. Papers in this session introduce new techniques to tackle some of these challenges. The first paper presents a schedulability analysis algorithm for real-time systems. The second paper describes a technique to estimate execution time bounds with full consideration of cache effects. The last paper discusses optimization of scratch-pad memory.      40.1 Schedulability of Event-Driven Code Blocks in Real-Time Embedded Systems    Speaker(s): Samarjit Chakraborty - ETH Zurich, Zurich, Switzerland    Author(s): Samarjit Chakraborty - ETH Zurich, Zurich, Switzerland Thomas Erlebach - ETH Zurich, Zurich, Switzerland Simon Kuenzli - ETH Zurich, Zurich, Switzerland Lothar Thiele - ETH Zurich, Zurich, Switzerland      40.2 Associative Caches in Formal Software Timing Analysis    Speaker(s): Fabian Wolf - Volkswagen AG, Wolfsburg, Germany    Author(s): Fabian Wolf - Volkswagen AG, Wolfsburg, Germany Jan Staschulat - Tech. Univ. of Braunschweig, Braunschweig, Germany Rolf Ernst - Tech. Univ. of Braunschweig, Braunschweig, Germany      40.3 Compiler-Directed Scratch Pad Memory Hierarchy Design and Management    Speaker(s): Alok Choudhary - Northwestern Univ., Evanston, PA    Author(s): Mahmut T. Kandemir - Penn State Univ., University Park, PA Alok Choudhary - Northwestern Univ., Evanston, PA